Senior Physical Design Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger- technologythat moves the world forward.Join us and, together, we'll advance your career.

THE ROLE:

THE PERSON:

KEY RESPONSIBLITIES:

• Lead physical design activities across block, subsystem, and chip-level implementations.
• Drive timing closure, signoff readiness, and PPA optimization for advanced-node designs.
• Develop and enhance physical design methodologies, design flows, and automation solutions.
• Perform static timing analysis, variation-aware timing analysis, and clock-tree optimization.
• Define and execute engineering change (ECO) strategies throughout implementation and signoff.
• Support formal verification, physical verification, and tapeout preparation activities.
• Analyze design data and trends to improve design quality, predictability, and efficiency.
• Collaborate with cross-functional engineering teams to achieve successful silicon delivery.
• Contribute to AI-assisted and machine learning-driven design optimization initiatives.
• Troubleshoot complex implementation challenges and develop scalable technical solutions.

PREFERRED EXPERIENCE:

• Experience with ASIC physical design, implementation, and timing closure.
• Experience working across block, subsystem, and chip-level design environments.
• Strong knowledge of static timing analysis, clock-tree synthesis, signoff, and ECO methodologies.
• Experience with industry-standard implementation tools such as Synopsys ICC2, Fusion Compiler, and/or Cadence Innovus.
• Experience with timing, power, and signoff tools such as PrimeTime, PrimeTime PX, PrimeShield, RedHawk, Formality, or Conformal.
• Advanced-node semiconductor design experience, including leading-edge process technologies.
• Strong scripting and automation skills using TCL, Python, Perl, Pandas, or similar technologies.
• Experience developing design flows, methodologies, and productivity-enhancing automation.
• Exposure to machine learning, AI-assisted design optimization, or data-driven engineering workflows.
• Experience with data analysis, database technologies, and design-quality metrics.

ACADEMIC CREDENTIALS:

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.